Shan Shen
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Postdoc
Room 8-408, East Main Building
Dept. of Computer Science and Technology
Tsinghua University
Beijing, China, 100084.
Email: yolkinnng@gmail.com.
More details: [CV].
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About me
I received my B.E. degree from the School of Internet of Things Engineering, Jiangnan University, in 2016.
I recieved my Ph.D. degree from the School of Electronic Science and Engineering, Southeast University, in 2021.
Now, I am a postdoc in Numbda group in the Department of Computer Science and Technology, Tsinghua University, collaborating with Prof.Wenjian Yu.
Research
My research interests include
Memory Circuit Design
Yield Analysis
Circuit Simulation
Recent Publications
Ling, Ming, Qingde Lin, Ke Tan, Tianxiang Shao, Shan Shen, and Jun Yang. "A Design of Timing Speculation SRAM-Based L1 Caches With PVT Autotracking Under Near-Threshold Voltages." IEEE Transactions on Very Large Scale Integration (VLSI) Systems 01 (2021): 1-13.
Shen, Shan, Liang Pang, Tianxiang Shao, Ming Ling, Xiao Shi, and Longxing Shi. "TYMER: a yield-based performance model for timing-speculation SRAM." In 2020 57th ACM/IEEE Design Automation Conference (DAC), pp. 1-6. IEEE, 2020.
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