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The software packages on this page can be used only for research purpose. Copyright and all rights therein are retained by authors or by other copyright holders. For any question, please contact Dr. Wenjian Yu.
RWCap2-solver: floating Random Walk based Capacitance solver for VLSI interconnects. Version 2 released. [2013] | |
Contributors: Chao Zhang, Hao Zhuang. Supervisor: Wenjian Yu. 1. The program RWCap2-solver inherits the usage of RWCap-solver, and works in companion with TechGFT for multi-dielectric cases. RWCap2-solver requires that the version number of Linux kernel is not less than 2.6.24. For more details, see RWCap-solver Version 1 2. Different from the RWCap-solver Version 1, rwcap2 can be executed in any path. 3. Run "rwcap2 --gft" first, when you want to test a new set of multi-dielectric cases. 4. In the "LargeCase" subfolder, there are large test cases with from 2000 to half a million conductor blocks. Notice for large case, rwcap only outputs some large coupling capacitances (otherwise the coupling capacitance approximates zero). Two running modes of the RWCap2-solver: $ rwcap2 --gft <data_dir> Register the folder "data_dir" storing the data generated by TechGFT. $ rwcap2 -f <file_name> [-p <rel_self_cap> | -t <num_walks> ] [-n <num_thread> ] [-w <min_width> ] "-f" specifies the input file name. "-p" specifies the threshold of relative error of Self capacitance. "-t" specifies the number of walks for termination. "-n" specifies the number of threads for parallel computing. "-w" specifies the minimum wire width of the process technology. For the algorithms implemented in this software, please refer to the following papers. | |
Ref: 1. Wenjian Yu, Hao Zhuang, Chao Zhang, Gang Hu, Zhi Liu, "RWCap: A floating random walk solver for 3-D capacitance extraction of VLSI interconnects," IEEE Trans. Computer-Aided Design, 32(3): 353-366, 2013. [pdf]
2. Chao Zhang and Wenjian Yu, "Efficient space management techniques for large-scale interconnect capacitance extraction with floating random walks," IEEE Trans. Computer-Aided Design, 32(10): 1633-1637, 2013 [pdf] 3. Wenjian Yu, "RWCap2: Advanced floating random walk solver for the capacitance extraction of VLSI interconnects," in Proc. International Conference on ASIC, Shenzhen, China. Oct. 2013, pp. 162-165. (invited paper) [pdf] |
RWCap-solver: floating Random Walk based Capacitance solver for VLSI interconnects. Version 1 released. [2012] | |
TechGFT: process Technology based Green's Function Table generator. Version 1 released. [2012] | |
Contributors: Hao Zhuang, Chao Zhang, Gang Hu, Kuangya Zhai, Zhi Liu, Ting Dai. Supervisor: Wenjian Yu. 1. The program RWCap-solver is compiled on a 32-bit Linux kernel version 2.6.9. The binary code is in the folder bin, and the folder cases includes some test cases. The data file has a suffix of .qbem. They obey the same format as the test cases for QBEM. 2. TechGFT runs with Matlab, and generates a dir. containing the GFT data for specified dielectric configuration. 3. While running RWCap-solver, MUST execute it in the FATHER DIR. of "bin". 4. Run "bin/rwcap --gft" first, when you want to test a new set of cases. Two running modes of RWCap-solver are as follows: $ bin/rwcap --gft <data_dir> Register the folder "data_dir" storing the data generated by TechGFT. $ bin/rwcap -f <file_name> [-p <rel_self_cap> | -t <num_walks> ] [-n <num_thread> ] "-f" specfies the input file name. "-p" specfies the threshold of relative error of Self capacitance. "-t" specfies the number of walks for termination. "-n" specfies the number of threads for parallel computing. For the algorithms implemented in this software, please refer to the following papers. | |
Ref: 1. Hao Zhuang, Wenjian Yu, Gang Hu, Zhi Liu, Zuochang Ye, "Fast floating random walk algorithm for multi-dielectric capacitance extraction with numerical characterization of Green¡¯s functions," in Proc. IEEE ASP-DAC
, Sydney, Australia, Jan. 2012, pp. 377-382. [pdf]
2. Wenjian Yu, Hao Zhuang, Chao Zhang, Gang Hu, Zhi Liu, "RWCap: A floating random walk solver for 3-D capacitance extraction of VLSI interconnects," IEEE Trans. Computer-Aided Design, 32(3): 353-366, 2013. [pdf] |
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